CeDOS - Commit 2ebd4ed5

PIC: Enable interrupts from slave PIC Slave PIC interrupts are passed to the Master through a dedicated interrupt line. In the Init method, currently all interrupts are disabled on both Slave and Master; In order to receive interrupts from the slave, we enable the cascaded interrupt.
Celina Sophie Kalus
hello@celinakalus.de
Tue, 02 Jan 2024 19:48:33 +0100
2 files changed, 8 insertions(+), 2 deletions(-)
M kernel/pic.c → kernel/pic.c 
@@ -26,9 +26,12 @@ outb(0x01, PIC1_DATA);
     outb(0x01, PIC2_DATA);
     nop(); nop(); nop(); nop();
 
-    // mask all interrupts
-    outb(0xff, PIC1_DATA);
+    // mask all interrupts (except for cascade)
+    outb(~(1 << PIC_IRQ_CASCADE), PIC1_DATA);
     outb(0xff, PIC2_DATA);
+
+    // EOI
+    pic2_eoi();
 
     return 1;
 }
M kernel/pic.h → kernel/pic.h 
@@ -16,6 +16,9 @@ #define PIC2_OFFSET				0x28
 
 #define PIC_END_OF_INTERRUPT	0x20
 
+// IRQ number of the slave interrupt cascade
+#define PIC_IRQ_CASCADE         2
+
 #define PIC1_IRQ(n) (PIC1_OFFSET + n)
 #define PIC2_IRQ(n) (PIC2_OFFSET + n)